//---------------------------------------------------------------------------------------------------- // ID Code : Source.h No.0002 // Update Note : // //---------------------------------------------------------------------------------------------------- //-------------------------------------------------- // Definitions of //-------------------------------------------------- #define _ANALOG_SOURCE_0 0 #define _ANALOG_SOURCE_1 1 #define _DE_ONLY_OFF 0 #define _DE_ONLY_ON 1 //-------------------------------------------------- // Definations of Input Port Types //-------------------------------------------------- /******************************************************************* Select V8 input path, please modify following define to change input path. If you select SV port, we only support, V0 with V1 or V1 with V2 or V2 with V3. ********************************************************************/ #define _NO_PORT 0 #define _DSUB_A0_PORT 1 #define _DVI_PORT 2 #define _DVI_I_A0_PORT 3 #if _PCB_TYPE == _PCB_PT2662C1B #define _VIDEO_AV_PORT _INPUTPORT_V2 #define _VIDEO_SV_PORT _INPUTPORT_V1 #define _VIDEO_TV_PORT _INPUTPORT_V3 #elif _PCB_TYPE==_PCB_PT2662B1C #define _VIDEO_AV_PORT _INPUTPORT_V2 #define _VIDEO_SV_PORT _INPUTPORT_V1 #define _VIDEO_TV_PORT _INPUTPORT_V3 #elif (_PCB_TYPE==_PCB_PT2662F1A ||_PCB_TYPE==_PCB_PT2662F1C) #define _VIDEO_TV_PORT _INPUTPORT_V3 #define _VIDEO_AV_PORT _INPUTPORT_V2 #define _VIDEO_SV_PORT _INPUTPORT_V1 #elif _PCB_TYPE==_PCB_PT2660A1A #define _VIDEO_AV_PORT _INPUTPORT_V2 #define _VIDEO_SV_PORT _INPUTPORT_V1 #define _VIDEO_TV_PORT _INPUTPORT_V3 #elif _PCB_TYPE==_PCB_PT2660_KTC57924G #define _VIDEO_AV_PORT _INPUTPORT_V2 #define _VIDEO_SV_PORT _INPUTPORT_V1 #define _VIDEO_TV_PORT _INPUTPORT_V3 //20080818 ccy add #elif _PCB_TYPE==_PCB_TEST #define _VIDEO_AV_PORT _INPUTPORT_V1 //add 20090914 #define _VIDEO_SV_PORT _INPUTPORT_V3 #define _VIDEO_TV_PORT _INPUTPORT_V2 //add 20090914 #else #define _VIDEO_AV_PORT _INPUTPORT_V0 #define _VIDEO_SV_PORT _INPUTPORT_V1 #define _VIDEO_TV_PORT _INPUTPORT_V3 #endif #define _YPBPR_A0_PORT 8 #define _VIDEO_YCBCR_PORT 9 #define _VIDEO_AV_SV_PORT1 10 #define _VIDEO_SCART_PORT 11 #define _HDMI_PORT 12 #define _DTV_PORT 13 #define _HDMI_PORT2 14 #if (_PCB_TYPE==_PCB_PT2662A) // modified by xyw 071022 #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _DSUB_A0_PORT #define _INPUT_PORT_MAX 6 #endif //#if (_PCB_TYPE==_PCB_PT2662A) #if (_PCB_TYPE == _PCB_PT2662C1B) #define _TYPEOF_INPUT_7SRC 0 #define _TYPEOF_INPUT_6SRC 1 #define _TYPEOF_INPUT _TYPEOF_INPUT_7SRC #if _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _HDMI_PORT2 #define _INPUT_PORT_TYPE_6 _DSUB_A0_PORT #define _INPUT_PORT_MAX 7 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _DSUB_A0_PORT #define _INPUT_PORT_MAX 6 #endif #endif //#if (_PCB_TYPE==_PCB_PT2662C1B) #if (_PCB_TYPE == _PCB_PT2662F1A) #define _TYPEOF_INPUT_7SRC 0 #define _TYPEOF_INPUT_6SRC 1 #define _TYPEOF_INPUT_8SRC 2 //include 2HDMI & external YCBCR input #define _TYPEOF_INPUT _TYPEOF_INPUT_7SRC #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT2 #define _INPUT_PORT_TYPE_5 _DSUB_A0_PORT #define _INPUT_PORT_MAX 6 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _HDMI_PORT2 #define _INPUT_PORT_TYPE_6 _DSUB_A0_PORT #define _INPUT_PORT_MAX 7 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_8SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_5 _HDMI_PORT #define _INPUT_PORT_TYPE_6 _HDMI_PORT2 #define _INPUT_PORT_TYPE_7 _DSUB_A0_PORT #define _INPUT_PORT_MAX 8 #define _SRC_MAP_COL (2) #if _SRC_MAP_COL==2 //#define _SRC_MAP_ROW 4//(9/_SRC_MAP_COL+9&0x01)//(_INPUT_PORT_MAX/_SRC_MAP_COL+_INPUT_PORT_MAX&0x01) // _INPUT_PORT_MAX/2 means source is seperated in 2 colum #define _SRC_MAP_ROW 5//(9/_SRC_MAP_COL+9&0x01)//(_INPUT_PORT_MAX/_SRC_MAP_COL+_INPUT_PORT_MAX&0x01) // _INPUT_PORT_MAX/2 means source is seperated in 2 colum #endif #endif #endif //#if (_PCB_TYPE==_PCB_PT2662F1A) #if (_PCB_TYPE == _PCB_PT2662F1C) #define _TYPEOF_INPUT_7SRC 0 #define _TYPEOF_INPUT_6SRC 1 #define _TYPEOF_INPUT_8SRC 2 //include 2HDMI & external YCBCR input #define _TYPEOF_INPUT _TYPEOF_INPUT_7SRC//_TYPEOF_INPUT_8SRC #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT2 #define _INPUT_PORT_TYPE_5 _DSUB_A0_PORT #define _INPUT_PORT_MAX 6 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _HDMI_PORT2 #define _INPUT_PORT_TYPE_6 _DSUB_A0_PORT #define _INPUT_PORT_MAX 7 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_8SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_5 _HDMI_PORT #define _INPUT_PORT_TYPE_6 _HDMI_PORT2 #define _INPUT_PORT_TYPE_7 _DSUB_A0_PORT #define _INPUT_PORT_MAX 8 #define _SRC_MAP_COL (2) #if _SRC_MAP_COL==2 //#define _SRC_MAP_ROW 4//(9/_SRC_MAP_COL+9&0x01)//(_INPUT_PORT_MAX/_SRC_MAP_COL+_INPUT_PORT_MAX&0x01) // _INPUT_PORT_MAX/2 means source is seperated in 2 colum #define _SRC_MAP_ROW 5//(9/_SRC_MAP_COL+9&0x01)//(_INPUT_PORT_MAX/_SRC_MAP_COL+_INPUT_PORT_MAX&0x01) // _INPUT_PORT_MAX/2 means source is seperated in 2 colum #endif #endif #endif //#if (_PCB_TYPE==_PCB_PT2662F1C) #if (_PCB_TYPE==_PCB_PT2660A1A) #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _DSUB_A0_PORT #define _INPUT_PORT_MAX 4 #endif //#if (_PCB_TYPE==_PCB_PT2660A1A) #if (_PCB_TYPE==_PCB_PT2662B1C) #define _TYPEOF_INPUT_6SRC 0 #define _TYPEOF_INPUT_5SRC 1 #define _TYPEOF_INPUT _TYPEOF_INPUT_6SRC #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _HDMI_PORT #define _INPUT_PORT_TYPE_5 _DSUB_A0_PORT #define _INPUT_PORT_MAX 6 #elif _TYPEOF_INPUT==_TYPEOF_INPUT_5SRC #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_TYPE_3 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_4 _DSUB_A0_PORT #define _INPUT_PORT_MAX 5 #endif #endif //#if (_PCB_TYPE==_PCB_PT2662B1C) #if (_PCB_TYPE==_PCB_PT2660_KTC57924G) #define _INPUT_PORT_TYPE_0 _DSUB_A0_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _VIDEO_SV_PORT #define _INPUT_PORT_MAX 3 #endif //#if (_PCB_TYPE==_PCB_PT2660_KTC57924G) //20080818 ccy add #if (_PCB_TYPE==_PCB_TEST) #define _INPUT_PORT_TYPE_0 _VIDEO_TV_PORT #define _INPUT_PORT_TYPE_1 _VIDEO_AV_PORT #define _INPUT_PORT_TYPE_2 _YPBPR_A0_PORT #define _INPUT_PORT_TYPE_3 _DSUB_A0_PORT #define _INPUT_PORT_MAX 3 #endif //#if (_PCB_TYPE==_PCB_TEST) #if(_SCALER_TYPE==_RTD2662) #define _INPUTPORT_D0 0 #define _INPUTPORT_D1 1 #define _INPUTPORT_A0 2 #define _INPUTPORT_A1 3 //#define _INPUTPORT_VI 4 #define _INPUTPORT_V0 4 #define _INPUTPORT_V1 5 #define _INPUTPORT_V2 6 #define _INPUTPORT_V3 7 #define _SEARCH_POL_0 0 #define _SEARCH_POL_1 1 #define _SEARCH_POL_2 2 #define _SEARCH_POL_3 3 #define _SEARCH_POL_4 4 #define _SEARCH_POL_5 5 #define _SEARCH_POL_6 6 #define _SEARCH_POL_7 7 //-------------------------------------------------- // Definations of Digital Input Port 0 //-------------------------------------------------- #define _D0_NO_PORT 0 #define _D0_DVI_PORT 1 #define _D0_DVI_I_PORT 2 #define _D0_HDMI_PORT 3 #define _D0_VIDEO8_PORT 5 #define _D0_INPUT_PORT_TYPE _D0_DVI_PORT //-------------------------------------------------- // Definations of Digital Input Port 1 //-------------------------------------------------- #define _D1_NO_PORT 0 #define _D1_DVI_PORT 1 #define _D1_DVI_I_PORT 2 #define _D1_HDMI_PORT 3 #define _D1_INPUT_PORT_TYPE _D1_HDMI_PORT //-------------------------------------------------- // Definations of Analog Input Port 0 //-------------------------------------------------- #define _A0_NO_PORT 0 #define _A0_VGA_PORT 1 #define _A0_YPBPR_PORT 2 #define _A0_INPUT_PORT_TYPE _A0_VGA_PORT //-------------------------------------------------- // Definations of Analog Input Port 1 //-------------------------------------------------- #define _A1_NO_PORT 0 #define _A1_VGA_PORT 1 #define _A1_YPBPR_PORT 2 #define _A1_VIDEO8_PORT 3 #define _A1_INPUT_PORT_TYPE _A1_YPBPR_PORT //-------------------------------------------------- // Definations of Embeded Video Input Port //-------------------------------------------------- #define _EMBEDED_VI_NO_PORT 0 #define _EMBEDED_VI_SV_Y_PORT 1 // If you select SV port, we only support #define _EMBEDED_VI_SV_C_PORT 9 // V0 with V1 or V1 with V2 or V2 with V3. #define _EMBEDED_VI_AV_PORT 2 #define _EMBEDED_VI_TV_PORT 3 #define _V0_INPUT_PORT_TYPE _EMBEDED_VI_AV_PORT #define _V1_INPUT_PORT_TYPE _EMBEDED_VI_SV_C_PORT #define _V2_INPUT_PORT_TYPE _EMBEDED_VI_SV_Y_PORT #define _V3_INPUT_PORT_TYPE _EMBEDED_VI_NO_PORT //-------------------------------------------------- // Definations of Input Port Groups //-------------------------------------------------- #define _INPUT_PORT_GROUP_0 0 #define _INPUT_PORT_GROUP_1 1 #define _INPUT_PORT_GROUP_2 2 #define _INPUT_PORT_GROUP_3 3 #define _INPUT_PORT_GROUP_4 4 #define _INPUT_PORT_GROUP_5 5 #define _INPUT_PORT_GROUP_6 6 #define _INPUT_PORT_GROUP_7 7 #define _D0_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _D1_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _A0_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _A1_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _V0_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _V1_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _V2_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 #define _V3_PORT_GROUP_TYPE _INPUT_PORT_GROUP_0 //-------------------------------------------------- // Definations of Input Port Search Priority //-------------------------------------------------- #define _INPUT_PORT_D0 0 #define _INPUT_PORT_D1 1 #define _INPUT_PORT_A0 2 #define _INPUT_PORT_A1 3 #define _INPUT_PORT_V0 4 #define _INPUT_PORT_V1 5 #define _INPUT_PORT_V2 6 #define _INPUT_PORT_V3 7 #define _INPUT_PORT_SEARCH_POL_0 _INPUT_PORT_D0 #define _INPUT_PORT_SEARCH_POL_1 _INPUT_PORT_D1 #define _INPUT_PORT_SEARCH_POL_2 _INPUT_PORT_A0 #define _INPUT_PORT_SEARCH_POL_3 _INPUT_PORT_A1 #define _INPUT_PORT_SEARCH_POL_4 _INPUT_PORT_V0 #define _INPUT_PORT_SEARCH_POL_5 _INPUT_PORT_V1 #define _INPUT_PORT_SEARCH_POL_6 _INPUT_PORT_V2 #define _INPUT_PORT_SEARCH_POL_7 _INPUT_PORT_V3 //-------------------------------------------------- // Input Source Search Times //-------------------------------------------------- #define _SOURCE_VGA_SEARCH_TIMES 3 #define _SOURCE_DVI_SEARCH_TIMES 10 #define _SOURCE_HDMI_SEARCH_TIMES 50 #define _SOURCE_VIDEO8_SEARCH_TIMES 10 #define _SOURCE_YPBPR_SEARCH_TIMES 3 #define _SOURCE_SV_SEARCH_TIMES 30 #define _SOURCE_AV_SEARCH_TIMES 30 #define _SOURCE_TV_SEARCH_TIMES 30 //-------------------------------------------------- // Input Port Search Times //-------------------------------------------------- #if((_D0_INPUT_PORT_TYPE == _D0_DVI_PORT) || (_D0_INPUT_PORT_TYPE == _D0_DVI_I_PORT)) #define _D0_PORT_SEARCH_TIMES _SOURCE_DVI_SEARCH_TIMES #elif(_D0_INPUT_PORT_TYPE == _D0_HDMI_PORT) #define _D0_PORT_SEARCH_TIMES _SOURCE_HDMI_SEARCH_TIMES #elif(_D0_INPUT_PORT_TYPE == _D0_VIDEO8_PORT) #define _D0_PORT_SEARCH_TIMES _SOURCE_VIDEO8_SEARCH_TIMES #else #define _D0_PORT_SEARCH_TIMES 1 #endif #if((_D1_INPUT_PORT_TYPE == _D1_DVI_PORT) || (_D1_INPUT_PORT_TYPE == _D1_DVI_I_PORT)) #define _D1_PORT_SEARCH_TIMES _SOURCE_DVI_SEARCH_TIMES #elif(_D1_INPUT_PORT_TYPE == _D1_HDMI_PORT) #define _D1_PORT_SEARCH_TIMES _SOURCE_HDMI_SEARCH_TIMES #else #define _D1_PORT_SEARCH_TIMES 1 #endif #if((_A0_INPUT_PORT_TYPE == _A0_VGA_PORT) || (_A0_INPUT_PORT_TYPE == _A0_YPBPR_PORT)) #define _A0_PORT_SEARCH_TIMES _SOURCE_VGA_SEARCH_TIMES #else #define _A0_PORT_SEARCH_TIMES 1 #endif #if((_A1_INPUT_PORT_TYPE == _A1_VGA_PORT) || (_A1_INPUT_PORT_TYPE == _A1_YPBPR_PORT)) #define _A1_PORT_SEARCH_TIMES _SOURCE_VGA_SEARCH_TIMES #elif(_A1_INPUT_PORT_TYPE == _A1_VIDEO8_PORT) #define _A1_PORT_SEARCH_TIMES _SOURCE_VIDEO8_SEARCH_TIMES #else #define _A1_PORT_SEARCH_TIMES 1 #endif #if((_V0_INPUT_PORT_TYPE == _EMBEDED_VI_SV_Y_PORT) || (_V0_INPUT_PORT_TYPE == _EMBEDED_VI_SV_C_PORT)) #define _V0_PORT_SEARCH_TIMES _SOURCE_SV_SEARCH_TIMES #elif(_V0_INPUT_PORT_TYPE == _EMBEDED_VI_AV_PORT) #define _V0_PORT_SEARCH_TIMES _SOURCE_AV_SEARCH_TIMES #elif(_V0_INPUT_PORT_TYPE == _EMBEDED_VI_TV_PORT) #define _V0_PORT_SEARCH_TIMES _SOURCE_TV_SEARCH_TIMES #else #define _V0_PORT_SEARCH_TIMES 1 #endif #if((_V1_INPUT_PORT_TYPE == _EMBEDED_VI_SV_Y_PORT) || (_V1_INPUT_PORT_TYPE == _EMBEDED_VI_SV_C_PORT)) #define _V1_PORT_SEARCH_TIMES _SOURCE_SV_SEARCH_TIMES #elif(_V1_INPUT_PORT_TYPE == _EMBEDED_VI_AV_PORT) #define _V1_PORT_SEARCH_TIMES _SOURCE_AV_SEARCH_TIMES #elif(_V1_INPUT_PORT_TYPE == _EMBEDED_VI_TV_PORT) #define _V1_PORT_SEARCH_TIMES _SOURCE_TV_SEARCH_TIMES #else #define _V1_PORT_SEARCH_TIMES 1 #endif #if((_V2_INPUT_PORT_TYPE == _EMBEDED_VI_SV_Y_PORT) || (_V2_INPUT_PORT_TYPE == _EMBEDED_VI_SV_C_PORT)) #define _V2_PORT_SEARCH_TIMES _SOURCE_SV_SEARCH_TIMES #elif(_V2_INPUT_PORT_TYPE == _EMBEDED_VI_AV_PORT) #define _V2_PORT_SEARCH_TIMES _SOURCE_AV_SEARCH_TIMES #elif(_V2_INPUT_PORT_TYPE == _EMBEDED_VI_TV_PORT) #define _V2_PORT_SEARCH_TIMES _SOURCE_TV_SEARCH_TIMES #else #define _V2_PORT_SEARCH_TIMES 1 #endif #if((_V3_INPUT_PORT_TYPE == _EMBEDED_VI_SV_Y_PORT) || (_V3_INPUT_PORT_TYPE == _EMBEDED_VI_SV_C_PORT)) #define _V3_PORT_SEARCH_TIMES _SOURCE_SV_SEARCH_TIMES #elif(_V3_INPUT_PORT_TYPE == _EMBEDED_VI_AV_PORT) #define _V3_PORT_SEARCH_TIMES _SOURCE_AV_SEARCH_TIMES #elif(_V3_INPUT_PORT_TYPE == _EMBEDED_VI_TV_PORT) #define _V3_PORT_SEARCH_TIMES _SOURCE_TV_SEARCH_TIMES #else #define _V3_PORT_SEARCH_TIMES 1 #endif #endif //---------------------------------------------------------------------------------------------------- #ifdef __SOURCE__ //-------------------------------------------------- // Global Variables //-------------------------------------------------- BYTE idata ucInputPortInfo[_INPUT_PORT_MAX] = { #if (_PCB_TYPE == _PCB_PT2662A) _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, #endif //#if (_PCB_TYPE == _PCB_PT2662A) #if _PCB_TYPE == _PCB_PT2662C1B #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, _INPUT_PORT_TYPE_6, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, #endif #endif //#if (_PCB_TYPE == _PCB_PT2662C1B) #if _PCB_TYPE == _PCB_PT2662F1A #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, _INPUT_PORT_TYPE_6, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_8SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, _INPUT_PORT_TYPE_6, _INPUT_PORT_TYPE_7, #endif #endif //#if (_PCB_TYPE == _PCB_PT2662F1A) #if _PCB_TYPE == _PCB_PT2662F1C #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_7SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, _INPUT_PORT_TYPE_6, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_8SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, _INPUT_PORT_TYPE_6, _INPUT_PORT_TYPE_7, #endif #endif //#if (_PCB_TYPE == _PCB_PT2662F1C) #if (_PCB_TYPE == _PCB_PT2660A1A) _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, #endif //#if (_PCB_TYPE == _PCB_PT2660A1A) #if (_PCB_TYPE == _PCB_PT2662B1C) #if _TYPEOF_INPUT==_TYPEOF_INPUT_6SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, _INPUT_PORT_TYPE_5, #elif _TYPEOF_INPUT==_TYPEOF_INPUT_5SRC _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, _INPUT_PORT_TYPE_3, _INPUT_PORT_TYPE_4, #endif #endif //#if (_PCB_TYPE == _PCB_PT2662B1C) #if (_PCB_TYPE == _PCB_PT2660_KTC57924G) _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, #endif //#if (_PCB_TYPE == _PCB_PT2660_KTC57924G) //20080818 ccy add #if (_PCB_TYPE == _PCB_TEST) _INPUT_PORT_TYPE_0, _INPUT_PORT_TYPE_1, _INPUT_PORT_TYPE_2, #endif //#if (_PCB_TYPE == _PCB_TEST) } ; #if(_SCALER_TYPE==_RTD2662) BYTE code tINPUT_PORT_SOURCE[] = { _INPUTPORT_D0, _INPUTPORT_D1, _INPUTPORT_A0, _INPUTPORT_A1, _INPUTPORT_V0, _INPUTPORT_V1, _INPUTPORT_V2, _INPUTPORT_V3, }; BYTE code tINPUT_PORT_TYPE[] = { _D0_INPUT_PORT_TYPE, _D1_INPUT_PORT_TYPE, _A0_INPUT_PORT_TYPE, _A1_INPUT_PORT_TYPE, _V0_INPUT_PORT_TYPE, _V1_INPUT_PORT_TYPE, _V2_INPUT_PORT_TYPE, _V3_INPUT_PORT_TYPE, }; BYTE code tINPUT_PORT_GROUP[] = { _D0_PORT_GROUP_TYPE, _D1_PORT_GROUP_TYPE, _A0_PORT_GROUP_TYPE, _A1_PORT_GROUP_TYPE, _V0_PORT_GROUP_TYPE, _V1_PORT_GROUP_TYPE, _V2_PORT_GROUP_TYPE, _V3_PORT_GROUP_TYPE, }; BYTE code tINPUT_PORT_SEARCH_POLARITY[] = { _INPUT_PORT_SEARCH_POL_0, _INPUT_PORT_SEARCH_POL_1, _INPUT_PORT_SEARCH_POL_2, _INPUT_PORT_SEARCH_POL_3, _INPUT_PORT_SEARCH_POL_4, _INPUT_PORT_SEARCH_POL_5, _INPUT_PORT_SEARCH_POL_6, _INPUT_PORT_SEARCH_POL_7, }; BYTE code tINPUT_PORT_SEARCH_TIMES[] = { _D0_PORT_SEARCH_TIMES, _D1_PORT_SEARCH_TIMES, _A0_PORT_SEARCH_TIMES, _A1_PORT_SEARCH_TIMES, _V0_PORT_SEARCH_TIMES, _V1_PORT_SEARCH_TIMES, _V2_PORT_SEARCH_TIMES, _V3_PORT_SEARCH_TIMES, }; #endif //-------------------------------------------------- // Function Prototypes //-------------------------------------------------- /* bit CSourceHandler(void); void CSourceInitialInputPort(void); void CSourceScanInputPort(void); bit CSourceScanInputPortVGA(BYTE ucAnalogSource); bit CSourceScanInputPortDVI(BYTE ucPar); */ #if _PCB_TYPE==_PCB_PT2662F1A #if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #if _SRC_MAP_COL==2 BYTE code tSrcMap[_INPUT_PORT_MAX][3] = { //{srcRow, srcCol, target} {0,0,0}, {1,0,1}, {2,0,2}, {3,0,3}, {4,0,4}, {0,1,5}, {1,1,6}, {2,1,7}, //{3,1,8}, }; #endif //#if _SRC_MAP_COL==2 #endif //#if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #endif //#if _PCB_TYPE==_PCB_PT2662F1A #if _PCB_TYPE==_PCB_PT2662F1C #if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #if _SRC_MAP_COL==2 BYTE code tSrcMap[_INPUT_PORT_MAX][3] = { //{srcRow, srcCol, target} {0,0,0}, {1,0,1}, {2,0,2}, {3,0,3}, {4,0,4}, {0,1,5}, {1,1,6}, {2,1,7}, //{3,1,8}, }; #endif //#if _SRC_MAP_COL==2 #endif //#if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #endif //#if _PCB_TYPE==_PCB_PT2662F1C #else //-------------------------------------------------- // Extern Global Variables //-------------------------------------------------- extern BYTE idata ucInputPortInfo[_INPUT_PORT_MAX]; /* //-------------------------------------------------- // Extern Function Prototypes //-------------------------------------------------- extern bit CSourceHandler(void); extern bit CSourceScanInputPortDVI(BYTE ucPar); extern void CSourceInitialInputPort(void); */ #if _PCB_TYPE==_PCB_PT2662F1A #if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #if _SRC_MAP_COL==2 extern BYTE code tSrcMap[_INPUT_PORT_MAX][3]; #endif //#if _SRC_MAP_COL==2 #endif //#if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #endif //#if _PCB_TYPE==_PCB_PT2662F1A #if _PCB_TYPE==_PCB_PT2662F1C #if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #if _SRC_MAP_COL==2 extern BYTE code tSrcMap[_INPUT_PORT_MAX][3]; #endif //#if _SRC_MAP_COL==2 #endif //#if _TYPEOF_INPUT == _TYPEOF_INPUT_8SRC #endif //#if _PCB_TYPE==_PCB_PT2662F1C #endif #if(_SCALER_TYPE==_RTD2662) //-------------------------------------------------- // Macro of Getting Input Source //-------------------------------------------------- #define GET_INPUTPORT_SOURCE(x) (tINPUT_PORT_SOURCE[tINPUT_PORT_SEARCH_POLARITY[x]]) //-------------------------------------------------- // Macro of Getting Input Port Type //-------------------------------------------------- //#define GET_INPUTPORT_TYPE(x) (tINPUT_PORT_TYPE[tINPUT_PORT_SEARCH_POLARITY[x]]) //-------------------------------------------------- // Macro of Getting Input Port Group Type //-------------------------------------------------- #define GET_INPUTPORT_GROUP_TYPE(x) (tINPUT_PORT_GROUP[tINPUT_PORT_SEARCH_POLARITY[x]]) //-------------------------------------------------- // Macro of Getting Input Port Search Times //-------------------------------------------------- #define GET_INPUTPORT_SEARCH_TIMES(x) (tINPUT_PORT_SEARCH_TIMES[tINPUT_PORT_SEARCH_POLARITY[x]]) #endif //---------------------------------------------------------------------------------------------------- /* //-------------------------------------------------- // Macro of Input Port Select //-------------------------------------------------- #define GET_INPUTPORT_SELECT(x) ((bit)(ucInputPortInfo[x] & _BIT7)) #define SET_INPUTPORT_SELECT(x) (ucInputPortInfo[x] |= _BIT7) #define CLR_INPUTPORT_SELECT(x) (ucInputPortInfo[x] &= ~_BIT7) //-------------------------------------------------- // Macro of Input Port Signal Available //-------------------------------------------------- #define GET_INPUTSIGNAL_AVAILABLE(x) ((bit)(ucInputPortInfo[x] & _BIT6)) #define SET_INPUTSIGNAL_AVAILABLE(x) (ucInputPortInfo[x] |= _BIT6) #define CLR_INPUTSIGNAL_AVAILABLE(x) (ucInputPortInfo[x] &= ~_BIT6) //-------------------------------------------------- // Macro of Input HS Selection //-------------------------------------------------- #define GET_INPUT_HS_SELECTION(x) ((bit)(ucInputPortInfo[x] & _BIT5)) #define SET_INPUT_HS_SELECTION(x) (ucInputPortInfo[x] |= _BIT5) #define CLR_INPUT_HS_SELECTION(x) (ucInputPortInfo[x] &= ~_BIT5) //-------------------------------------------------- // Macro of Getting Input Port Type //-------------------------------------------------- #define GET_INPUTPORT_TYPE(x) (ucInputPortInfo[x] & (_BIT0 | _BIT1 | _BIT2 | _BIT3)) #define SET_INPUTPORT_TYPE(x,y) (ucInputPortInfo[x] = ((ucInputPortInfo[x] & ~(_BIT0 | _BIT1 | _BIT2 | _BIT3)) | y )) */