//----------------------------------------------------------------------------------------------------
// ID Code      : Pcb.h No.0001
// Update Note  :

//20080823 ccy add
#if _PCB_TYPE==_PCB_TEST

//--------------------------------------------------
// Definitions for GPIO Control
//--------------------------------------------------
#define _LED_ON				0
#define _LED_OFF			1

#define _PANEL_ON                   	1  // Power on  state for LCD panel
#define _PANEL_OFF                 	0 	// Power off state for LCD panel

#define _LIGHT_ON                   	0   // Power on  state for backlight inverter
#define _LIGHT_OFF                 	1   // Power off state for backlight inverter

#define _VDC_ON                     		1   // Power on  state for video decoder
#define _VDC_OFF                    		0   // Power off state for video decoder

#define _LVDS_ON                    	0   // Power on  state for LVDS Tx
#define _LVDS_OFF                   	0   // Power off state for LVDS Tx

#if (_SCALER_TYPE==_RTD2662)
#define _DDC_CHANNEL_FOR_D0         _DDC2   // DDC Channel SEL for digital input 0
#define _DDC_CHANNEL_FOR_D1         _DDC3   // DDC Channel SEL for digital input 1
#endif

	//--------------------------------------------------
	// RTD2662 Pin Share 
	//--------------------------------------------------
#define _PIN_50                                 	(0 & 0x07)  // 0 ~ 5 (0: P6D0i, 1: P6D0o<open-drain>, 2: P6D0o<push-pull>, 3: ADCA0, 4: AVOUT, 5: VCLK)
#if (_KEY_SCAN_MODE==_GPIO_MODE) //desert on 2010-1-19 20:55 
#define _PIN_51                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D1i, 1: P6D1o<open-drain>, 2: P6D1o<push-pull>, 3: ADCA1)
#define _PIN_52                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D2i, 1: P6D2o<open-drain>, 2: P6D2o<push-pull>, 3: ADCA2)
#define _PIN_53                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D3i, 1: P6D3o<open-drain>, 2: P6D3o<push-pull>, 3: ADCA3)
#define _PIN_54                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D4i, 1: P6D4o<open-drain>, 2: P6D4o<push-pull>, 3: ADCA4)
#else
#define _PIN_51                                 	(3 & 0x03)  // 0 ~ 3 (0: P6D1i, 1: P6D1o<open-drain>, 2: P6D1o<push-pull>, 3: ADCA1)
#define _PIN_52                                 	(3 & 0x03)  // 0 ~ 3 (0: P6D2i, 1: P6D2o<open-drain>, 2: P6D2o<push-pull>, 3: ADCA2)
#define _PIN_53                                 	(3 & 0x03)  // 0 ~ 3 (0: P6D3i, 1: P6D3o<open-drain>, 2: P6D3o<push-pull>, 3: ADCA3)
#define _PIN_54                                 	(0 & 0x03)  // 0 ~ 3 (0: P6D4i, 1: P6D4o<open-drain>, 2: P6D4o<push-pull>, 3: ADCA4)
#endif
#define _PIN_55                                 	(1 & 0x07)  // 0 ~ 5 (0: P6D5i, 1: P6D5o<open-drain>, 2: P6D5o<push-pull>, 3: ADCB0, 4: PWM1, 5: PWM5)

#define _PIN_56_57_IIC_ENABLE   	(0 & 0x01)  // 0 ~ 1 (0: Disable, 1: Enable) Pin56,57 for IIC
#define _PIN_56                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D6i, 1: P6D6o<open-drain>, 2: P6D6o<push-pull>, 3: ADCB1) Effective only if _PIN_56_57_IIC_ENABLE = Disable.
#define _PIN_57                                 	(1 & 0x03)  // 0 ~ 3 (0: P6D7i, 1: P6D7o<open-drain>, 2: P6D7o<push-pull>, 3: ADCB2) Effective only if _PIN_56_57_IIC_ENABLE = Disable.

#define _PIN_58_59_DDC1_ENABLE  	(0 & 0x01)  // 0 ~ 1 (0: Disable, 1: Enable) Pin58,59 for DDC1
#define _PIN_58_59_DDC1_ENABLE  	(0 & 0x01)  // 0 ~ 1 (0: Disable, 1: Enable) Pin58,59 for DDC1
#define _PIN_58                                 	(0 & 0x03)  // 0 ~ 3 (0: P3D0i, 1: P3D0o<open-drain>, 2: P3D0o<push-pull>, 3: RXD<open-drain>) Effective only if _PIN_58_59_DDC1_ENABLE = Disable.
#define _PIN_59                                 	(0 & 0x03)  // 0 ~ 3 (0: P3D1i, 1: P3D1o<open-drain>, 2: P3D1o<push-pull>, 3: TXD<open-drain>) Effective only if _PIN_58_59_DDC1_ENABLE = Disable.
	//czl 071012
	//#define _PIN_64               				(0 & 0x02)	 // 0 ~ 7 (0: P1D0i, 1: P1D0o<open-drain>, 2: P1D0o<push-pull>, 3: T2, 4: SD0, 5: SPDIF0, 6: TCON[0], 7: IrDA)
#define _PIN_64               				(1 & 0x07)	 // 0 ~ 7 (0: P1D0i, 1: P1D0o<open-drain>, 2: P1D0o<push-pull>, 3: T2, 4: SD0, 5: SPDIF0, 6: TCON[0], 7: IrDA)

#define _PIN_65                 			(0 & 0x07)  // 0 ~ 7 (0: P1D1i, 1: P1D1o<open-drain>, 2: P1D1o<push-pull>, 3: T2EX, 4: TCON[1], 5: TCON[7], 6: WS, 7: PWM1)
#define _PIN_66                 			(0 & 0x07)  // 0 ~ 6 (0: P1D2i, 1: P1D2o<open-drain>, 2: P1D2o<push-pull>, 3: CLKO, 4: SCK, 5: TCON[2], 6: TCON[4]) Effective only if 8-bit TTL Disable.
#define _PIN_67                 			(0 & 0x07)  // 0 ~ 5 (0: P1D3i, 1: P1D3o<open-drain>, 2: P1D3o<push-pull>, 3: MCK, 4: TCON[5], 5: TCON[9]) Effective only if 8-bit TTL Disable.
#define _PIN_68                 			(0 & 0x07)  // 0 ~ 6 (0: P1D4i, 1: P1D4o<open-drain>, 2: P1D4o<push-pull>, 3: SD0, 4: TCON[3], 5: TCON[13], 6: SPDIF0) Effective only if 8-bit TTL Disable.
#define _PIN_69                                 	(0 & 0x07)  // 0 ~ 7 (0: P1D5i, 1: P1D5o<open-drain>, 2: P1D5o<push-pull>, 3: SD1, 4: TCON[3], 5: TCON[7], 6: SPDIF1, 7: IICSCL) Effective only if 8-bit TTL Disable.
#define _PIN_70                                 	(0 & 0x07)  // 0 ~ 7 (0: P1D6i, 1: P1D6o<open-drain>, 2: P1D6o<push-pull>, 3: SD2, 4: TCON[9], 5: TCON[11], 6: SPDIF2, 7: IICSDA) Effective only if 8-bit TTL Disable.
#define _PIN_71                                 	(0 & 0x0f)  // 0 ~ 8 (0: P1D7i, 1: P1D7o<open-drain>, 2: P1D7o<push-pull>, 3: SD3, 4: TCON[8], 5: TCON[10], 6: SPDIF3, 7: PWM1, 8: PWM5) Effective only if 8-bit TTL Disable.

#define _PIN_74to83                            	(0 & 0x03)  // 0 ~ 2 (0: None, 1: GPI, 2: GPO) Effective only if single-port LVDS without E/O swap.

#define _PIN_96                                 	(4 & 0x07)  // 0 ~ 4 (0: P5D2i, 1: P5D2o<open-drain>, 2: P5D2o<push-pull>, 3: PWM0, 4: DCLK)
#define _PIN_97                                 	(4 & 0x07)  // 0 ~ 4 (0: P5D3i, 1: P5D3o<open-drain>, 2: P5D3o<push-pull>, 3: PWM1, 4: DVS)
#define _PIN_98                                 	(1 & 0x03)  // 0 ~ 3 (0: P5D4i, 1: P5D4o<open-drain>, 2: P5D4o<push-pull>, 3: PWM2)
#ifdef _BACKLIGHT_SUPPORT_USE_PWM4
#define _PIN_99                                 	(3 & 0x07)  // 0 ~ 5 (0: P5D5i, 1: P5D5o<open-drain>, 2: P5D5o<push-pull>, 3: PWM3, 4: TCON[6], 5: TCON[11])
#else
#define _PIN_99                                 	(1 & 0x07)  // 0 ~ 5 (0: P5D5i, 1: P5D5o<open-drain>, 2: P5D5o<push-pull>, 3: PWM3, 4: TCON[6], 5: TCON[11])
#endif
#define _PIN_100                                	(3 & 0x07)  // 0 ~ 5 (0: P5D6i, 1: P5D6o<open-drain>, 2: P5D6o<push-pull>, 3: PWM4, 4: TCON[3], 5: TCON[12])

#define _PIN_101                                	(1 & 0x07)  // 0 ~ 4 (0: P5D7i, 1: P5D7o<open-drain>, 2: P5D7o<push-pull>, 3: PWM5, 4: TCON[0])
#define _PIN_102                                	(0 & 0x07)  // 0 ~ 6 (0: P7D6i, 1: P7D6o<open-drain>, 2: P7D6o<push-pull>, 3: PWM0, 4: SD3, 5: SPDIF3, 6: TCON[10])
#define _PIN_103                                	(0 & 0x07)  // 0 ~ 7 (0: P7D5i, 1: P7D5o<open-drain>, 2: P7D5o<push-pull>, 3: PWM1, 4: SD2, 5: SPDIF2, 6: TCON[8], 7: IICSCL)
#define _PIN_104                                	(1 & 0x07)  // 0 ~ 7 (0: P7D4i, 1: P7D4o<open-drain>, 2: P7D4o<push-pull>, 3: SD1, 4: IRQ, 5: TCON[5], 6: SPDIF1, 7: IICSDA)
#define _PIN_105                                	(1 & 0x07)  // 0 ~ 5 (0: P8D0i, 1: P8D0o<open-drain>, 2: P8D0o<push-pull>, 3: TCON[9], 4: SD0, 5: SPDIF0)
#define _PIN_108              			(1 & 0x03)  // 0 ~ 5 (0: P8D1i, 1: P8D1o<open-drain>, 2: P8D1o<push-pull>, 3: CLKO, 4: MCK, 5: TCON[7])
#define _PIN_109                                	(0 & 0x07)  // 0 ~ 5 (0: P3D2i, 1: P3D2o<open-drain>, 2: P3D2o<push-pull>, 3: INT0, 4: TCON[3], 5: SCK)
#define _PIN_110              			(1 & 0x07)  // 0 ~ 5 (0: P3D3i, 1: P3D3o<open-drain>, 2: P3D3o<push-pull>, 3: INT1, 4: TCON[6], 5: WS)
#define _PIN_111                                	(1 & 0x07)  // 0 ~ 6 (0: P3D4i, 1: P3D4o<open-drain>, 2: P3D4o<push-pull>, 3: T0, 4: TCON[4], 5: SD0, 6: SPDIF0)
#define _PIN_112                                	(0 & 0x07)  // 0 ~ 6 (0: P3D5i, 1: P3D5o<open-drain>, 2: P3D5o<push-pull>, 3: T1, 4: TCON[9], 5: SD1, 6: SPDIF1)
#if (_IR_HANDLER_MODE==_SW_MODE)
#define _PIN_113                                	(0 & 0x06)//0x07)  // 0 ~ 6 (0: P3D6i, 1: P3D6o<open-drain>, 2: P3D6o<push-pull>, 3: TCON[1], 4: SD2, 5: SPDIF2, 6: IrDA)
#elif(_IR_HANDLER_MODE==_HW_MODE)
#define _PIN_113                                	(6 & 0x06)//0x07)  // 0 ~ 6 (0: P3D6i, 1: P3D6o<open-drain>, 2: P3D6o<push-pull>, 3: TCON[1], 4: SD2, 5: SPDIF2, 6: IrDA)
#endif
#define _PIN_114                                	(0 & 0x07)  // 0 ~ 6 (0: P3D7i, 1: P3D7o<open-drain>, 2: P3D7o<push-pull>, 3: TCON[13], 4: SD3, 5: SPDIF3, 6: VCLK)

#define _PIN_121                                	(0 & 0x03)  // 0 ~ 3 (0: DDCSCL3, 1: P7D3i, 2: P7D3o<open-drain>, 3: P7D3o<push-pull>)
#define _PIN_122                                	(0 & 0x03)  // 0 ~ 3 (0: DDCSDA3, 1: P7D2i, 2: P7D2o<open-drain>, 3: P7D2o<push-pull>)
#define _PIN_123                                	(0 & 0x03)  // 0 ~ 3 (0: DDCSDA2, 1: P7D1i, 2: P7D1o<open-drain>, 3: P7D1o<push-pull>)
#define _PIN_124                                	(0 & 0x03)  // 0 ~ 3 (0: DDCSCL2, 1: P7D0i, 2: P7D0o<open-drain>, 3: P7D0o<push-pull>)

//--------------------------------------------------
// MCU Pin Assignment
//--------------------------------------------------

#define bLIGHTPOWER    		(MCU_PORT74_PIN_REG_FFD3)
#ifndef _BACKLIGHT_SUPPORT_USE_PWM4
#define bLIGHTEN               (MCU_PORT55_PIN_REG_FFC4)
#endif
//#define bWRITE_PROTECT (MCU_PORT63_PIN_REG_FFCA)

sbit bTunerPower			= P3^3;
#define SET_TUNER_POWER()	do {bTunerPower = 1;}while (0)
#define CLR_TUNER_POWER()	do {bTunerPower = 0;}while (0)

sbit bDMB_ONOFF			= P3^1;
#define SET_DMB_POWER()	do {bDMB_ONOFF = 0;}while (0)
#define CLR_DMB_POWER()	do {bDMB_ONOFF = 1;}while (0)

#define bPANELPOWER     		(MCU_PORT80_PIN_REG_FFD6)
//#define bDMB_IR     			

sbit bVIDEO_SEL_A			= P1^5;
sbit bVIDEO_SEL_B			= P1^6;
#define SET_TV_VIDEO()		do {}while (0)
#define SET_AV_VIDEO()		do {}while (0)	   
#define SET_DMB_VIDEO()	do {}while (0)
#define SET_NC_VIDEO()		do {}while (0)

//#define bExtPower			MCU_PORT74_PIN_REG_FFD3
#define SET_EXT_POWER()		do {}while (0)
#define CLR_EXT_POWER()		do {}while (0)

//#define bVGL				(MCU_PORT65_PIN_REG_FFCC)
#define SET_NEG_PWM(pwm)	do {}while(0)

#define GET_HEADPHONE_INSERT()	(_FALSE)

sbit bAUDIO_SEL_A		= P1^0;
#define bAUDIO_SEL_B		(MCU_PORT65_PIN_REG_FFCC)
#define SET_TV_AUDIO()		do {bAUDIO_SEL_A=0;bAUDIO_SEL_B=0;}while (0)
#define SET_AV_AUDIO()		do {bAUDIO_SEL_A=1;bAUDIO_SEL_B=0;}while (0)
#define SET_DMB_AUDIO()	do {bAUDIO_SEL_A=1;bAUDIO_SEL_B=1;}while (0)
#define SET_NC_AUDIO()		do {bAUDIO_SEL_A=0;bAUDIO_SEL_B=1;}while (0)

#define bFM_D0				do {}while(0)//(MCU_PORT73_PIN_REG_FFD2)
#define bFM_D1				do {}while(0)//(MCU_PORT72_PIN_REG_FFD1)
#define bFM_D2				do {}while(0)//(MCU_PORT71_PIN_REG_FFD0)
#define bFM_BL				do {}while(0)//(MCU_PORT70_PIN_REG_FFCF)
#define SET_FM_POWER()		do{}while(0)
#define CLR_FM_POWER()		do{}while(0)

//#define KEY_A				(MCU_PORT76_PIN_REG_FFD5)
//#define KEY_B				(MCU_PORT57_PIN_REG_FFC6)
//#define KEY_C				(MCU_PORT56_PIN_REG_FFC5)
//#define KEY_D				(MCU_PORT55_PIN_REG_FFC4)

#define SET_EARPHONE_MUTE()			do {}while(0)
#define CLR_EARPHONE_MUTE()			do {}while(0)

#define bAUDIO_MUTE					(MCU_PORT57_PIN_REG_FFC6)
#define GET_AUDIO_CHIP_MUTE()			bAUDIO_MUTE		//add 20091126
#define SET_AUDIO_CHIP_MUTE()			do {bAUDIO_MUTE = 1;}while (0)
#define CLR_AUDIO_CHIP_MUTE()			do {bAUDIO_MUTE = 0;}while (0)

//#define bAMP_STB_A						(MCU_PORT76_PIN_REG_FFD5)
#define SET_AUDIO_CHIP_STBY(select)		do{}while(0)

#define SET_HOTPLUG_HDMI(on_off)		do {}while (0)//
#define SET_HOTPLUG_HDMI2(on_off)		do {}while (0)//

//sbit bIR_GPIO 							= P3^6;	

//for EEPROM/tuner using
#define bI2CSDA							(MCU_PORT67_PIN_REG_FFCE)
#define bI2CSCL							(MCU_PORT66_PIN_REG_FFCD)

//sbit bLEDR								=P3^2;
//sbit bLEDG								=P3^3;
#define SET_LEDR(x)						do {}while (0)
#define SET_LEDG(x)						do {}while (0)				

//DVD power control
//low:OFF, high:ON
//#define bDvdStandby				MCU_PORT52_PIN_REG_FFC1
#define bDVDPower                       MCU_PORT81_PIN_REG_FFD7
#define SET_DVD_POWERONOFF()		do {bDVDPower =1;}while (0)//do {bDVDPower = 0;}while (0)
#define CLR_DVD_POWERONOFF()		do {bDVDPower =0;}while (0)//do {bDVDPower = 1;} while (0)
//#define SET_DVD_POWER(x)			do {bDvdStandby=(x)?(1):(0);}while(0)
// L:enable
// H:disable
//#define bDvdIrEnable				MCU_PORT62_PIN_REG_FFC9
#ifdef PANEL_USE_UD_LR	
#define bPanelUDSet			(MCU_PORT55_PIN_REG_FFC4)
#define SET_PANEL_UD(par)		do {bPanelUDSet = (par)?1:0;}while (0)

#define bPanelLRSet			(MCU_PORT54_PIN_REG_FFC3)
#define SET_PANEL_LR(par)		do {bPanelLRSet = (par)?1:0;}while (0)
#endif
sbit bIR_OUT						= P3^4;
#define bFM_SET_A			(MCU_PORT56_PIN_REG_FFC5)
#define bFM_SET_B			(MCU_PORT53_PIN_REG_FFC2)
#if (_KEY_SCAN_MODE==_GPIO_MODE) //desert on 2010-1-19 20:55 
//for key
sbit bP1_2			= P1^2;
sbit bP1_3			= P1^3;
#define bP61						(MCU_PORT61_PIN_REG_FFC8)
#define bP62						(MCU_PORT62_PIN_REG_FFC9)
#define bP63						(MCU_PORT63_PIN_REG_FFCA)
//#define bP66						(MCU_PORT64_PIN_REG_FFCB)
#define bP64					(MCU_PORT64_PIN_REG_FFCB)
#define bP67						(bP1_3)
#define WriteKey0(a)		bP61=a
#define WriteKey1(a)		bP62=a
#define WriteKey2(a)		bP63=a
//#define WriteKey3(a)		bP66=a
#define WriteKey3(a)		bP64=a
#define WriteKey4(a)		bP67=a

#define ReadKey0(a)		bP61
#define ReadKey1(a)		bP62
#define ReadKey2(a)		bP63
//#define ReadKey3(a)		bP66
#define ReadKey3(a)		bP64
#define ReadKey4(a)		bP67
#endif

#endif  //#if _PCB_TYPE==_PCB_PT2660_KTC57924G




