#if _PANEL_TYPE == _LQ121S1LG55
#define _PANEL_STYLE				_PANEL_LVDS

#define _PANEL_DISPLAY_RATIO		_PANEL_4_3

#define _DISP_WID					800
#define _DISP_LEN					600

#define LVDS_MAP					LVDS_MAP1

//osd position, according to panel
#define _OSD_HPOSITION_OFFSET           				8
#define _OSD_VPOSITION_OFFSET           				2
#if 1
//20081126, x.hu, PQ finetune
#define _CT9300_RED_VGA		48	//cool
#define _CT9300_GREEN_VGA		49
#define _CT9300_BLUE_VGA		52
#define _CT7500_RED_VGA		47	//normal
#define _CT7500_GREEN_VGA		45
#define _CT7500_BLUE_VGA		45
#define _CT6500_RED_VGA		48	//warm
#define _CT6500_GREEN_VGA		45
#define _CT6500_BLUE_VGA		43
#define _CTUSER_RED_VGA		_CT7500_RED_VGA	//user
#define _CTUSER_GREEN_VGA		_CT7500_GREEN_VGA
#define _CTUSER_BLUE_VGA		_CT7500_BLUE_VGA

#define _CT9300_RED_VIDEO		48	//cool
#define _CT9300_GREEN_VIDEO	51
#define _CT9300_BLUE_VIDEO		50
#define _CT7500_RED_VIDEO		50	//normal
#define _CT7500_GREEN_VIDEO	50
#define _CT7500_BLUE_VIDEO		50
#define _CT6500_RED_VIDEO		54	//warm
#define _CT6500_GREEN_VIDEO	50
#define _CT6500_BLUE_VIDEO		50
#define _CTUSER_RED_VIDEO		_CT7500_RED_VIDEO	//user
#define _CTUSER_GREEN_VIDEO	_CT7500_GREEN_VIDEO
#define _CTUSER_BLUE_VIDEO		_CT7500_BLUE_VIDEO

#define _CT9300_RED_HDMI		_CT9300_RED_VIDEO	//cool
#define _CT9300_GREEN_HDMI	_CT9300_GREEN_VIDEO
#define _CT9300_BLUE_HDMI		_CT9300_BLUE_VIDEO
#define _CT7500_RED_HDMI		_CT7500_RED_VIDEO	//normal
#define _CT7500_GREEN_HDMI       _CT7500_GREEN_VIDEO
#define _CT7500_BLUE_HDMI		_CT7500_BLUE_VIDEO
#define _CT6500_RED_HDMI		_CT6500_RED_VIDEO	//warm
#define _CT6500_GREEN_HDMI	_CT6500_GREEN_VIDEO
#define _CT6500_BLUE_HDMI		_CT6500_BLUE_VIDEO
#define _CTUSER_RED_HDMI		_CTUSER_RED_VIDEO	//user
#define _CTUSER_GREEN_HDMI	_CTUSER_GREEN_VIDEO
#define _CTUSER_BLUE_HDMI		_CTUSER_BLUE_VIDEO

#define _CT9300_RED_YPBPR		_CT9300_RED_VIDEO	//cool
#define _CT9300_GREEN_YPBPR	_CT9300_GREEN_VIDEO
#define _CT9300_BLUE_YPBPR		_CT9300_BLUE_VIDEO
#define _CT7500_RED_YPBPR		_CT7500_RED_VIDEO	//normal
#define _CT7500_GREEN_YPBPR	_CT7500_GREEN_VIDEO
#define _CT7500_BLUE_YPBPR		_CT7500_BLUE_VIDEO
#define _CT6500_RED_YPBPR		_CT6500_RED_VIDEO	//warm
#define _CT6500_GREEN_YPBPR	_CT6500_GREEN_VIDEO
#define _CT6500_BLUE_YPBPR		_CT6500_BLUE_VIDEO
#define _CTUSER_RED_YPBPR		_CTUSER_RED_VIDEO	//user
#define _CTUSER_GREEN_YPBPR	_CTUSER_GREEN_VIDEO
#define _CTUSER_BLUE_YPBPR		_CTUSER_BLUE_VIDEO
#else
//color temp range is _COLORTEMP_MIN ~ _COLORTEMP_MIN+100
#define _CT9300_RED_VGA		44	//9300
#define _CT9300_GREEN_VGA		65
#define _CT9300_BLUE_VGA		50
#define _CT7500_RED_VGA		46	//7500
#define _CT7500_GREEN_VGA		65
#define _CT7500_BLUE_VGA		39
#define _CT6500_RED_VGA		50	//6500
#define _CT6500_GREEN_VGA		65
#define _CT6500_BLUE_VGA		30
#define _CTUSER_RED_VGA		50
#define _CTUSER_GREEN_VGA		50
#define _CTUSER_BLUE_VGA		50

#define _CT9300_RED_HDMI		44	//9300
#define _CT9300_GREEN_HDMI	50
#define _CT9300_BLUE_HDMI		51
#define _CT7500_RED_HDMI		46	//7500
#define _CT7500_GREEN_HDMI       51
#define _CT7500_BLUE_HDMI		38
#define _CT6500_RED_HDMI		49	//6500
#define _CT6500_GREEN_HDMI	50
#define _CT6500_BLUE_HDMI		28
#define _CTUSER_RED_HDMI		50
#define _CTUSER_GREEN_HDMI	50
#define _CTUSER_BLUE_HDMI		50


#define _CT9300_RED_VIDEO		43	//9300
#define _CT9300_GREEN_VIDEO	49
#define _CT9300_BLUE_VIDEO		51
#define _CT7500_RED_VIDEO		44	//7500
#define _CT7500_GREEN_VIDEO	50
#define _CT7500_BLUE_VIDEO		37
#define _CT6500_RED_VIDEO		49	//6500
#define _CT6500_GREEN_VIDEO	50
#define _CT6500_BLUE_VIDEO		28
#define _CTUSER_RED_VIDEO		50
#define _CTUSER_GREEN_VIDEO	50
#define _CTUSER_BLUE_VIDEO		50


#define _CT9300_RED_YPBPR		43	//9300
#define _CT9300_GREEN_YPBPR	49
#define _CT9300_BLUE_YPBPR		51
#define _CT7500_RED_YPBPR		44	//7500
#define _CT7500_GREEN_YPBPR	50
#define _CT7500_BLUE_YPBPR		37
#define _CT6500_RED_YPBPR		49	//6500
#define _CT6500_GREEN_YPBPR	50
#define _CT6500_BLUE_YPBPR		28
#define _CTUSER_RED_YPBPR		50
#define _CTUSER_GREEN_YPBPR	50
#define _CTUSER_BLUE_YPBPR		50
#endif
#ifdef __SCALER__

//--------------------------------------------------
// Panel Configuration :
// _DISP_DOUBLE_PORT | _DISP_EO_SWAP | _DISP_RB_SWAP | _DISP_ML_SWAP |
// _DISP_18_BIT | _RSDS_GC_SWAP | _RSDS_HL_SWAP | _RSDS_PN_SWAP,
//--------------------------------------------------
code PanelType Panel[] =
{
       {
        _PANEL_LVDS,                                        // Panel Style
		_DISP_SINGLE_PORT | _DISP_18_BIT,                   // Panel Configuration

        32,                                                 // Display Horizontal Start Position
        800,                                               // Display Horizontal Width
        800+32,                                               // Display Horizontal End Position

       1056,//+80,  //1056+140                                             // Display Horizontal Total Clock Number in One Display Line
       1395,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        940,                                                // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        600,                                               // Display Vertical Height
        600+12,                                               // Display Vertical End Position

        666,                                               // Display Vertical Total Line Number in One Frame
        698,                                               // Maxinum Display Vertical Total Line Number in One Frame
        628,                                               // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

     40,// 34,//-5+2 ,//40,                                                // Typical Pixel Clock in MHz
      42,//42+8,// 42,                                                // Maxinum Pixel Clock in MHz
     35,// 35-5,//  35,                                                // Mininum Pixel Clock in MHz
	}
};

#else

extern code PanelType Panel[];


#endif

#endif	//