//----------------------------------------------------------------------------------------------------
// ID Code      : Panel.h No.0000
// Update Note  :
//
//----------------------------------------------------------------------------------------------------

//#ifdef __MAIN__


#if _PANEL_TYPE == _LVDS_1280X800

#define _PANEL_DISPLAY_RATIO	_PANEL_4_3

#define _DISP_WID				1280
#define _DISP_LEN				800

#define LVDS_MAP				LVDS_MAP1

//osd position, according to panel
#define _OSD_HPOSITION_OFFSET	8
#define _OSD_VPOSITION_OFFSET	2

//Y=320
#define _CT9300_RED_VGA		48-4	//9300
#define _CT9300_GREEN_VGA		59-4
#define _CT9300_BLUE_VGA		45+5
#define _CT7500_RED_VGA		51-4	//7500
#define _CT7500_GREEN_VGA		59-3
#define _CT7500_BLUE_VGA		38+5
#define _CT6500_RED_VGA		54-3	//6500
#define _CT6500_GREEN_VGA		59-3
#define _CT6500_BLUE_VGA		33+5
#define _CTUSER_RED_VGA		50
#define _CTUSER_GREEN_VGA		50
#define _CTUSER_BLUE_VGA		50

//Y=360
#define _CT9300_RED_HDMI		49-3	//9300
#define _CT9300_GREEN_HDMI	58-3
#define _CT9300_BLUE_HDMI		42+8
#define _CT7500_RED_HDMI		52-3	//7500
#define _CT7500_GREEN_HDMI       58-3
#define _CT7500_BLUE_HDMI		35+8
#define _CT6500_RED_HDMI		55-3	//6500
#define _CT6500_GREEN_HDMI	58-3
#define _CT6500_BLUE_HDMI		30+8
#define _CTUSER_RED_HDMI		50
#define _CTUSER_GREEN_HDMI	50
#define _CTUSER_BLUE_HDMI		50

//Y=360
#define _CT9300_RED_VIDEO		48-3	//9300
#define _CT9300_GREEN_VIDEO	58-3
#define _CT9300_BLUE_VIDEO		42+8
#define _CT7500_RED_VIDEO		53-3	//7500
#define _CT7500_GREEN_VIDEO	59-3
#define _CT7500_BLUE_VIDEO		36+8
#define _CT6500_RED_VIDEO		56-3	//6500
#define _CT6500_GREEN_VIDEO	59-3
#define _CT6500_BLUE_VIDEO		31+8
#define _CTUSER_RED_VIDEO		50
#define _CTUSER_GREEN_VIDEO	50
#define _CTUSER_BLUE_VIDEO		50
//Y=360
#define _CT9300_RED_YPBPR		55-10	//9300
#define _CT9300_GREEN_YPBPR	64-5
#define _CT9300_BLUE_YPBPR		45+5
#define _CT7500_RED_YPBPR		58-10	//7500
#define _CT7500_GREEN_YPBPR	64-5
#define _CT7500_BLUE_YPBPR		45+5
#define _CT6500_RED_YPBPR		61-10	//6500
#define _CT6500_GREEN_YPBPR	64-5
#define _CT6500_BLUE_YPBPR		33+5
#define _CTUSER_RED_YPBPR		50
#define _CTUSER_GREEN_YPBPR	50
#define _CTUSER_BLUE_YPBPR		50


#ifdef __SCALER__

//--------------------------------------------------
// Panel Configuration :
// _DISP_DOUBLE_PORT | _DISP_EO_SWAP | _DISP_RB_SWAP | _DISP_ML_SWAP |
// _DISP_18_BIT | _RSDS_GC_SWAP | _RSDS_HL_SWAP | _RSDS_PN_SWAP,
//--------------------------------------------------
code PanelType Panel[] =
{
	{ 

		_PANEL_LVDS,                                        // Panel Style

		_DISP_SINGLE_PORT | _DISP_18_BIT | _DISP_EO_SWAP,   // Panel Configuration

		32,                                                 // Display Horizontal Start Position
		1280,                                               // Display Horizontal Width
		1312,                                               // Display Horizontal End Position

		1408,                                               // Display Horizontal Total Clock Number in One Display Line
		1500,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
		1344,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

		12,                                                 // Display Vertical Start Position
		800,                                                // Display Vertical Height
		812,                                                // Display Vertical End Position

		816,                                                // Display Vertical Total Line Number in One Frame
		830,                                                // Maxinum Display Vertical Total Line Number in One Frame
		810,                                                // Mininum Display Vertical Total Line Number in One Frame

		16,                                                 // Display H Sync Width
		3,                                                  // Display V Sync Height

		100,                                                 // Typical Pixel Clock in MHz
		130,                                                // Maxinum Pixel Clock in MHz
		60,                                                 // Mininum Pixel Clock in MHz
	},
};

#else

extern code PanelType Panel[];

#endif

#endif	//#if _PANEL_TYPE==_AU_LVDS_T315XW01