#if _PANEL_TYPE == _AUO_LVDS_22_WXGA

#define _PANEL_DISPLAY_RATIO		_PANEL_16_9

#define _DISP_WID					1680
#define _DISP_LEN					1050

#define LVDS_MAP					LVDS_MAP1

//display ratio mode set
#define _RATIO_16X9						0
#define _RATIO_4X3						1
#define _DISP_RATIO_MIN				_RATIO_16X9
#define _DISP_RATIO_MAX				_RATIO_4X3
#define _DISP_RATIO_MODENUM			(_DISP_RATIO_MAX+1-_DISP_RATIO_MIN)

#define GET_DISP_DHWID_RATIO_16X9	_DISP_WID//((_DISP_LEN/9)*16)
#define GET_DISP_DHSEXT_RATIO_16X9	0//((_DISP_WID-GET_DISP_DHWID_RATIO_16X9)/2)
#define GET_DISP_DHWID_RATIO_4X3		((_DISP_LEN/3)*4)
#define GET_DISP_DHSEXT_RATIO_4X3		((_DISP_WID-GET_DISP_DHWID_RATIO_4X3)/2)

//osd position, according to panel
#define _OSD_HPOSITION_OFFSET           				5
#define _OSD_VPOSITION_OFFSET           				0

//color temp range is _COLORTEMP_MIN ~ _COLORTEMP_MIN+100
#define _CT9300_RED_VGA		40	//9300
#define _CT9300_GREEN_VGA		44
#define _CT9300_BLUE_VGA		48
#define _CT7500_RED_VGA		42	//7500
#define _CT7500_GREEN_VGA		44
#define _CT7500_BLUE_VGA		39
#define _CT6500_RED_VGA		44	//6500
#define _CT6500_GREEN_VGA		44
#define _CT6500_BLUE_VGA		39
#define _CTUSER_RED_VGA		50
#define _CTUSER_GREEN_VGA		50
#define _CTUSER_BLUE_VGA		50

#define _CT9300_RED_HDMI		44	//9300
#define _CT9300_GREEN_HDMI	49
#define _CT9300_BLUE_HDMI		51
#define _CT7500_RED_HDMI		47	//7500
#define _CT7500_GREEN_HDMI       50
#define _CT7500_BLUE_HDMI		45
#define _CT6500_RED_HDMI		49	//6500
#define _CT6500_GREEN_HDMI	50
#define _CT6500_BLUE_HDMI		39
#define _CTUSER_RED_HDMI		50
#define _CTUSER_GREEN_HDMI	50
#define _CTUSER_BLUE_HDMI		50


#define _CT9300_RED_VIDEO		44	//9300
#define _CT9300_GREEN_VIDEO	44
#define _CT9300_BLUE_VIDEO		50
#define _CT7500_RED_VIDEO		41	//7500
#define _CT7500_GREEN_VIDEO	45
#define _CT7500_BLUE_VIDEO		39
#if _CUSTOMER_CGT
#define _CT6500_RED_VIDEO		46//52	//6500
#define _CT6500_GREEN_VIDEO	42//51
#define _CT6500_BLUE_VIDEO		50//45
#else	//#if _CUSTOMER_CGT
#define _CT6500_RED_VIDEO		52	//6500
#define _CT6500_GREEN_VIDEO	51
#define _CT6500_BLUE_VIDEO		45
#endif	//#if _CUSTOMER_CGT
#define _CTUSER_RED_VIDEO		50
#define _CTUSER_GREEN_VIDEO	50
#define _CTUSER_BLUE_VIDEO		50


#define _CT9300_RED_YPBPR		45	//9300
#define _CT9300_GREEN_YPBPR	50
#define _CT9300_BLUE_YPBPR		52
#define _CT7500_RED_YPBPR		47	//7500
#define _CT7500_GREEN_YPBPR	50
#define _CT7500_BLUE_YPBPR		44
#define _CT6500_RED_YPBPR		49	//6500
#define _CT6500_GREEN_YPBPR	50
#define _CT6500_BLUE_YPBPR		38
#define _CTUSER_RED_YPBPR		50
#define _CTUSER_GREEN_YPBPR	50
#define _CTUSER_BLUE_YPBPR		50

#ifdef __SCALER__

#if _DISP_RATIO_M2_SUPPORT
unsigned int code tDispDHWidRatio[_DISP_RATIO_MODENUM]=
{
	GET_DISP_DHWID_RATIO_16X9,
	GET_DISP_DHWID_RATIO_4X3,
};
unsigned int code tDispDHSExtRatio[_DISP_RATIO_MODENUM]=
{
	GET_DISP_DHSEXT_RATIO_16X9,
	GET_DISP_DHSEXT_RATIO_4X3,
};
#endif	//#if _DISP_RATIO_M2_SUPPORT


//--------------------------------------------------
// Panel Configuration :
// _DISP_DOUBLE_PORT | _DISP_EO_SWAP | _DISP_RB_SWAP | _DISP_ML_SWAP |
// _DISP_18_BIT | _RSDS_GC_SWAP | _RSDS_HL_SWAP | _RSDS_PN_SWAP,
//--------------------------------------------------
code PanelType Panel[] =
{
	{   // CMO LVDS 22 wide
		_PANEL_LVDS,                                        // Panel Style
		
		_DISP_DOUBLE_PORT | _DISP_24_BIT,                  // Panel Configuration 

		32,                                                 // Display Horizontal Start Position
        	1680,                                               // Display Horizontal Width
        	1712,                                               // Display Horizontal End Position

        	1840,  //2256,//                                             // Display Horizontal Total Clock Number in One Display Line
        	2400,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        	1760,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

		//2007.08.17 for fixing YPBPR 480i@60 error
        	12,//20,//16,//12,                                                 // Display Vertical Start Position
        	1050,                                               // Display Vertical Height
        	1062,//1070,//1066,//1062,                                               // Display Vertical End Position

        	1080,                                               // Display Vertical Total Line Number in One Frame
        	1300,                                               // Maxinum Display Vertical Total Line Number in One Frame
        	1060,                                               // Mininum Display Vertical Total Line Number in One Frame

        	16,                                                 // Display H Sync Width
        	3,                                                  // Display V Sync Height

        	119, //144,//                                               // Typical Pixel Clock in MHz
        	164,                                                // Maxinum Pixel Clock in MHz
        	94,                                                // Mininum Pixel Clock in MHz
	},

};

#else

#if _DISP_RATIO_M2_SUPPORT
extern unsigned int code tDispDHWidRatio[_DISP_RATIO_MODENUM];
extern unsigned int code tDispDHSExtRatio[_DISP_RATIO_MODENUM];
#endif	//#if _DISP_RATIO_M2_SUPPORT

extern code PanelType Panel[];


#endif

#endif 
